Masterarbeit mit der CST AG

[Sergej_Scherer]

Für Alle, die sich für HF-Messtechnik und Simulationstechnik begeistern können, bietet diese Masterarbeit enormes Entwicklungspotential auch in beruflicher Hinsicht.



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Work Topic Proposal for Student Assistant and Follow-Up Master Thesis
to be conducted at the Chair of High Frequency Electronics (HFE) of RWTH Aachen

RF/Microwave Model Refinement, Parameter Extraction and Measurement Verification for Multilayer Ceramic Chip Components (CLR)


SMD (Surface Mount Devices) chip capacitors (and resistors, inductors) are used worldwide in billions of pieces in PCBs (Printed Circuit Boards) for electronic applications up to low and medium GHz frequencies. They are mounted by using pick-and-place procedures and have footprints (sizes) down to less than a square millimetre.

Advanced physics-oriented modelling of multilayer chip capacitors (C), planar chip inductors (L) and chip thin film resistors (R) has been developed in the supervisor’s group in an industry project since 2005, which quite accurately predicts the impedance spectra of SMD capacitors and inductors up to ca. 20 GHz. The models and parameter extraction routines have been implemented subsequently into the LINMIC software suite (as passive component library SMDMOD) which in 2007 was transferred into the ownership of CST AG, Darmstadt, Germany, and have then gradually been implemented into the CST STUDIO SUITE product family. Very recently, in the context of using SMDMOD for crack detection in multilayer chip capacitors, a wide range of measurements and comparisons was made, for which the results indicate the need to carefully review the original models in order to take into account the effects of drastically reduced size and advanced more complex dielectric material technology of latest SMD component families.

In a preparatory phase of ca. three months as a student assistant, the candidate should make himself familiar with S-parameter characterisation, modelling and parameter extraction (based on SMDMOD) for RLC chip components in the RF/Microwave Lab. of the Chair of High Frequency Electronics (HFE, Prof. Dr. R. Negra) of RWTH Aachen in close coordination with the staff/co-supervisor of CST AG, Darmstadt, and the supervisor at RWTH Aachen (meetings with CST to be defined). Based on the results and assessment of the preparatory phase, the details of the topic for a follow-up master thesis will be defined in agreement with CST. During the master thesis, several short work phases are planned at CST Darmstadt (to be funded by CST) in order to enable close interaction with the CST staff developing and continuously upgrading the CST STUDIO SUITE.

Material to start from:
Previous Ph.D. work in the Supervisor’s Group, available list of technical literature, project details of supervisor’s SMD modelling project and associated software (SMDMOD modelling and parameter extraction), wide range of physical PCB test structures (C-, L-, R-SMD components mounted on PCBs for RFOW measurements), further suggestions by the supervisor at RWTH Aachen/co-supervisor at CST Darmstadt. Protection of the IP of such material will be addressed in a Supervisory Agreement .

Aachen, 12 July 2014

Prof. Dr.-Ing. Rolf H. Jansen (Supervisor acting for RWTH/HFE Prof. Negra)
Email: jansen@ithe.rwth-aachen.de
Dr.-Ing. G. Baum (Co-Supervisor acting for CST AG, Darmstadt)
Email: Georg.Baum@cst.com